Renesas Electronics 9DB233AGILF Clock Buffer 20-Pin TSSOP
- RS stock no.:
- 263-7982
- Mfr. Part No.:
- 9DB233AGILF
- Manufacturer:
- Renesas Electronics
Bulk discount available
Subtotal (1 tube of 74 units)*
R 3 531,058
(exc. VAT)
R 4 060,75
(inc. VAT)
FREE delivery for orders over R 1,500.00
In Stock
- 74 unit(s) ready to ship from another location
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit | Per Tube* |
|---|---|---|
| 74 - 222 | R 47.717 | R 3,531.06 |
| 296 + | R 46.524 | R 3,442.78 |
*price indicative
- RS stock no.:
- 263-7982
- Mfr. Part No.:
- 9DB233AGILF
- Manufacturer:
- Renesas Electronics
Specification
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Renesas Electronics | |
| Number of Elements per Chip | 4 | |
| Maximum Supply Current | 80 mA | |
| Maximum Input Frequency | 110MHz | |
| Mounting Type | SMD | |
| Package Type | TSSOP | |
| Pin Count | 20 | |
| Select all | ||
|---|---|---|
Brand Renesas Electronics | ||
Number of Elements per Chip 4 | ||
Maximum Supply Current 80 mA | ||
Maximum Input Frequency 110MHz | ||
Mounting Type SMD | ||
Package Type TSSOP | ||
Pin Count 20 | ||
- COO (Country of Origin):
- TW
The Renesas Electronics zero-delay buffer supports PCIe Gen1 and Gen2 clocking requirements. It is driven by a differential SRC output pair from an IDT main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without spread-spectrum clocking.
SMBus Interface
Selectable PLL bandwidth
Minimizes jitter peaking in downstream PLLs
Cycle-to-cycle jitter < 50ps
Output-to-output skew < 50 ps
PCIe Gen3 phase jitter < 1.0ps RMS
Selectable PLL bandwidth
Minimizes jitter peaking in downstream PLLs
Cycle-to-cycle jitter < 50ps
Output-to-output skew < 50 ps
PCIe Gen3 phase jitter < 1.0ps RMS
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