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Renesas Electronics 9DB102BGILF, LVDS Buffer 2 TTL Buffer, 20-Pin TSSOP

RS stock no.:: 217-7929
Mfr. Part No.:: 9DB102BGILF
Manufacturer:: Renesas Electronics

Renesas Electronics 9DB102BGILF, LVDS Buffer 2 TTL Buffer, 20-Pin TSSOP

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Bulk discount available

Subtotal (1 pack of 5 units)*

R 411,31

(exc. VAT)

R 473,005

(inc. VAT)

Add 20 units to get free delivery

Orders below R 1 500,00 (exc. VAT) cost R 120,00.

In Stock

Plus 120 unit(s) shipping from 16 February 2026

Need more? Click ‘Check delivery dates’ to find extra stock and lead times.

Units	Per unit	Per Pack*
5 - 5	R 82.262	R 411.31
10 - 20	R 80.206	R 401.03
25 - 95	R 77.80	R 389.00
100 - 245	R 74.688	R 373.44
250 +	R 71.70	R 358.50

*price indicative

RS stock no.:: 217-7929
Mfr. Part No.:: 9DB102BGILF
Manufacturer:: Renesas Electronics

Specification

Technical data sheets

Legislation and Compliance

Product Details

Find similar products by selecting one or more attributes.

Select all	Attribute	Value
	Brand	Renesas Electronics
	Product Type	LVDS Buffer
	Number of Drivers	2
	Input Type	TTL
	Sub Type	Buffer
	Output Type	Buffer
	Number of Elements per Chip	2
	Mount Type	Surface
	Package Type	TSSOP
	Pin Count	20
	Minimum Supply Voltage	3V
	Maximum Supply Voltage	3.3V
	Minimum Operating Temperature	-40°C
	ESD Protection	Yes
	Maximum Operating Temperature	85°C
	Length	6.6mm
	Series	9DB102
	Standards/Approvals	No
	Width	4.5 mm
	Height	1.05mm
	Automotive Standard	No

	Select all
	Brand Renesas Electronics
	Product Type LVDS Buffer
	Number of Drivers 2
	Input Type TTL
	Sub Type Buffer
	Output Type Buffer
	Number of Elements per Chip 2
	Mount Type Surface
	Package Type TSSOP
	Pin Count 20
	Minimum Supply Voltage 3V
	Maximum Supply Voltage 3.3V
	Minimum Operating Temperature -40°C
	ESD Protection Yes
	Maximum Operating Temperature 85°C
	Length 6.6mm
	Series 9DB102
	Standards/Approvals No
	Width 4.5 mm
	Height 1.05mm
	Automotive Standard No

Datasheet - 9DB102BGILF

The Renesas Electronics 9DB102 zero-delay buffer supports PCI Express clocking requirements. The 9DB102 is driven by a differential SRC output pair from an IDT CK409/CK410-compliant main clock generator such as the 952601 or 954101. It attenuates jitter on the input clock and has a selectable PLL Band Width to maximize performance in systems with or without Spread- Spectrum clocking.

2 - 0.7 V HCSL differential output pairs

Phase jitter: PCIe Gen2 < 3.1 ps rms

Phase jitter: PCIe Gen1 < 86 ps peak to peak

Supports zero delay buffer mode and fanout mode

Bandwidth programming available

33-110 MHz operation in PLL mode

10-110 MHz operation in Bypass mode

Renesas Electronics 9DB102BGILF, LVDS Buffer 2 TTL Buffer, 20-Pin TSSOP

Add 20 units to get free delivery

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