onsemi, Logic Level Translator Translator 2 LVPECL/LVDS to LVTTL, 8-Pin TSSOP

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Subtotal (1 tube of 100 units)*

R 11 308,10

(exc. VAT)

R 13 004,30

(inc. VAT)

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Temporarily out of stock
  • Shipping from 01 December 2026
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Units
Per unit
Per Tube*
100 - 100R 113.081R 11,308.10
200 - 400R 110.254R 11,025.40
500 - 700R 106.947R 10,694.70
800 - 900R 102.669R 10,266.90
1000 +R 98.562R 9,856.20

*price indicative

RS stock no.:
186-8834
Mfr. Part No.:
MC100EPT26DTG
Manufacturer:
onsemi
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Brand

onsemi

Direction Type

Uni-Directional

Product Type

Logic Level Translator

Maximum Propagation Delay Time @ CL

800ps

Mount Type

Surface

Package Type

TSSOP

Number of Elements per Chip

2

Pin Count

8

Output Type

TTL

Logic Function

Translator

Maximum Low Level Output Current

24mA

Minimum Supply Voltage

3.6V

Maximum High Level Output Current

-3mA

Translation

LVPECL/LVDS to LVTTL

Maximum Supply Voltage

3.6V

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

85°C

Standards/Approvals

No

Series

MC100EPT2

Height

1.95mm

Length

3.1mm

Automotive Standard

No

The MC100EPT26 is a 1:2 Fanout Differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the 1:2 fanout design of the EPT26 makes it Ideal for applications which require the low skew duplication of a signal in a tightly packed PC board. The VBB output allows the EPT26 to be used in a single-ended input mode. In this mode the VBB output is tied to the D0bar input for a non-inverting buffer or the D0 input for an inverting buffer. If used, the VBB pin should be bypassed to ground via a 0.01 uF capacitor.

1.4ns Typical Propagation Delay

Maximum Frequency > 275 MHz Typical

The 100 Series Contains Temperature Compensation

Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V

Open Input Default State

Safety Clamp on Inputs

24mA TTL outputs

Q Outputs will default LOW with inputs open or at VEE VBB Output

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