STMicroelectronics, 32 bit ARM Cortex M4, STM32F407VG Microcontroller, 168 MHz, 1024kB FLASH, 100-Pin LQFP

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Subtotal (1 reel of 1000 units)*

R 198 440,00

(exc. VAT)

R 228 210,00

(inc. VAT)

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1000 - 1000R 198.44R 198,440.00
2000 +R 193.479R 193,479.00

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RS stock no.:
196-2031
Mfr. Part No.:
STM32F407VGT6TR
Manufacturer:
STMicroelectronics
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Brand

STMicroelectronics

Product Type

Microcontroller

Series

STM32F407VG

Package Type

LQFP

Mount Type

Surface

Pin Count

100

Device Core

ARM Cortex M4

Data Bus Width

32bit

Program Memory Size

1024kB

Maximum Clock Frequency

168MHz

RAM Size

192kB

Maximum Supply Voltage

3.6V

Minimum Operating Temperature

-40°C

Maximum Operating Temperature

85°C

Width

14.2 mm

Standards/Approvals

No

Length

14.2mm

DACs

2 x 12 Bit

Height

1.45mm

Maximum Power Dissipation Pd

465mW

Number of Programmable I/Os

140

Minimum Supply Voltage

1.8V

Number of Timers

2

Program Memory Type

FLASH

Automotive Standard

No

Instruction Set Architecture

RISC

ADCs

16 x 12 Bit

The STM32F405xx and STM32F407xx family is based on the high-performance ARM®Cortex®-M4 32-bit RISC core operating at a frequency of up to 168 MHz. The Cortex-M4 core features a Floating point unit (FPU) single precision which supports all ARM single-precision data-processing instructions and data types. It also implements a full set of DSP instructions and a memory protection unit (MPU) which enhances application security.

The STM32F405xx and STM32F407xx family incorporates high-speed embedded memories (Flash memory up to 1 Mbyte, up to 192 Kbytes of SRAM), up to 4 Kbytes of backup SRAM, and an extensive range of enhanced I/Os and peripherals connected to two APB buses, three AHB buses and a 32-bit multi-AHB bus matrix.

All devices offer three 12-bit ADCs, two DACs, a low-power RTC, twelve general-purpose 16-bit timers including two PWM timers for motor control, two general-purpose 32-bit timers. a true random number generator (RNG). They also feature standard and advanced communication interfaces.

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