Nexperia Flip Flop IC HC, CMOS, 14-Pin SO-14
- RS stock no.:
- 243-4416P
- Mfr. Part No.:
- 74HC73D-Q100J
- Manufacturer:
- Nexperia
Image representative of range
Bulk discount available
View bulk pricing optionsSubtotal 50 units (supplied on a continuous strip)*
R 319,55
(exc. VAT)
R 367,50
(inc. VAT)
FREE delivery for orders over R 1,500.00
In Stock
- 1,075 unit(s) ready to ship from another location
Need more? Click ‘Check delivery dates’ to find extra stock and lead times.
Units | Per unit |
|---|---|
| 50 - 75 | R 6.391 |
| 100 - 225 | R 6.199 |
| 250 - 975 | R 5.951 |
| 1000 + | R 5.713 |
*price indicative
- RS stock no.:
- 243-4416P
- Mfr. Part No.:
- 74HC73D-Q100J
- Manufacturer:
- Nexperia
Specification
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Product Type | Flip Flop IC | |
| Logic Family | HC | |
| Input Type | Single Ended | |
| Output Type | CMOS | |
| Polarity | Negative | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 2V | |
| Package Type | SO-14 | |
| Pin Count | 14 | |
| Maximum Supply Voltage | 6V | |
| Flip-Flop Type | JK Type | |
| Trigger Type | Negative Edge | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Series | 74HC73-Q100 | |
| Standards/Approvals | HBM JESD22-A114F, AEC-Q100 (Grade 1), JEDEC Standards JESD8C (2.7 V to 3.6 V), JESD7A (2.0 V to 6.0 V), MM JESD22-A115-A | |
| Automotive Standard | AEC-Q100 Grade 1 | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Product Type Flip Flop IC | ||
Logic Family HC | ||
Input Type Single Ended | ||
Output Type CMOS | ||
Polarity Negative | ||
Mount Type Surface | ||
Minimum Supply Voltage 2V | ||
Package Type SO-14 | ||
Pin Count 14 | ||
Maximum Supply Voltage 6V | ||
Flip-Flop Type JK Type | ||
Trigger Type Negative Edge | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Series 74HC73-Q100 | ||
Standards/Approvals HBM JESD22-A114F, AEC-Q100 (Grade 1), JEDEC Standards JESD8C (2.7 V to 3.6 V), JESD7A (2.0 V to 6.0 V), MM JESD22-A115-A | ||
Automotive Standard AEC-Q100 Grade 1 | ||
The Nexperia dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ output LOW and the nQ output high. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
CMOS low-power dissipation
Wide supply voltage range from 2.0 to 6.0 V
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Related links
- Nexperia Flip Flop IC HC 14-Pin SO-14
- Nexperia 74HC73D-Q100J Flip Flop IC HC 14-Pin SO-14
- onsemi MC74HC273ADWG 1 Flip Flop IC HC 20-Pin SOIC
- onsemi 1 Flip Flop IC HC 20-Pin SOIC
- Nexperia 74HCT74D 2 Flip Flop IC HCT 14-Pin SOIC
- Nexperia 74HC73D,652 Flip Flop IC
- Nexperia 74LVC1G79GW CMOS, 5-Pin TSSOP
- Nexperia 1 Flip Flop IC 74LVC 8-Pin TSSOP