Microchip PIC18F25K42-I/SP, 8 bit 8 Bit CPU, PIC18F25K42 Microcontroller, 64 MHz, 32kB FLASH, 28-Pin SPDIP

Bulk discount available

Subtotal (1 tube of 15 units)*

R 679,485

(exc. VAT)

R 781,41

(inc. VAT)

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Being discontinued
  • Final 315 unit(s), ready to ship from another location
Units
Per unit
Per Tube*
15 - 15R 45.299R 679.49
30 - 60R 44.167R 662.51
75 - 135R 42.842R 642.63
150 +R 41.128R 616.92

*price indicative

RS stock no.:
146-3248
Mfr. Part No.:
PIC18F25K42-I/SP
Manufacturer:
Microchip
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Brand

Microchip

Family Name

PIC18

Package Type

SPDIP

Mounting Type

Through Hole

Pin Count

28

Device Core

8 bit CPU

Data Bus Width

8bit

Program Memory Size

32 kB

Maximum Frequency

64MHz

RAM Size

256 B

USB Channels

0

Number of PWM Units

1 x 10 bit

Number of SPI Channels

1

Number of UART Channels

2

Number of I2C Channels

2

Typical Operating Supply Voltage

2.3 → 5.5 V

Number of USART Channels

0

Number of CAN Channels

0

ADCs

24 x 12 bit

Maximum Number of Ethernet Channels

0

Length

35.56mm

Maximum Operating Temperature

+85 °C

Number of ADC Units

1

Instruction Set Architecture

RISC

Height

3.81mm

Dimensions

35.56 x 7.49 x 3.81mm

Number of Ethernet Channels

0

Program Memory Type

Flash

Number of PCI Channels

0

Number of LIN Channels

0

Pulse Width Modulation

1 (4 x 10 bit)

Minimum Operating Temperature

-40 °C

Width

7.49mm

PIC18(L)FxxK42 MCUs integrate a rich set of core independent peripherals, intelligent analog peripherals and large Flash/RAM/EEPROM memories. These 28-, 40- and 48-pin devices also offer a host of low power features, performance improvements and design flexibility options that easily and rapidly enable the complex set of functions required by many of today's embedded control applications.

Vectored Interrupt (VI) capability - Faster interrupt response time

Interrupt Vector Table

Programmable single or dual priority

Two level hardware context saving

Direct Memory Access (DMA) controllers - Move data between without CPU

Eliminates need for CPU involvement in data transfers

Access to all memory spaces and peripherals

Flexible source and destination message sizes

Programmable DMA priority

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